Hello
I started to work with ModGen (Module Generator), I started the new experiment with simple differential pair transistors as you see from the picture. I followed the Cadence help to create the Modern,
My problem is when I run the routing (after setting the Trunks and Topologies), Cadence will miss the contact of the transistors gates and the sources of the upper array row.
Could you please help me to fix this issue
I am using Cadence Virtuoso IC6.1.8
Many thanks