Hi all,
I am translating a netlist file to schematic using spiceIn in Virtuoso 617. The netlist is for a standard cell library in TSMC 180nm technology. After importing the netlist, I found that two parameters: diode area and pj is not translated properly. I searched the forum and found some threads, and I added *.DIODEAREA in the netlist. But the area was not changed. Now I have two questions:
- How to modify the file, so that the diode area and pj in schematic can be changed according to the netlist.
- In the layout of the cell, there are some width and length. But the netlist only provides area of the cell. How can I fill in the length and width of the diode in the schematic?
Here is a how the diode is defined in the netlist file:
*.DIOAREA
*.DIOPERI
.subckt ANTENNABWP7T I VDD VSS
DI3 VSS I dn 0.2037p
.ends
Here is the translated parameters for the diode:
Thanks in advance.
Best,
OrangeHalo