Dear experts,
When generating or placing pins from schematic to layout, how control mapping of bus pins?
Say how to map sel<0:1> schematic pin to sel[0] and sel[1] layout pins.
Thanks
Norayr
Dear experts,
When generating or placing pins from schematic to layout, how control mapping of bus pins?
Say how to map sel<0:1> schematic pin to sel[0] and sel[1] layout pins.
Thanks
Norayr