I use the "ibis_buffer" component of analog Library "analogLib" to verify my IBIS model of a 3-state output buffer. The IBIS data is included by file. My testbench includes this ibis_buffer and the original 3-state output buffer from which the IBIS data was gained from, to compare the two. Each of then has a transmission line and load model connected to the output, of the same type and parametric values, of course. Both have their output are enabled.
The waveforms have the same shape, yet the delays are incorrect. When using a very slow ramp at the stimulus input, I can see that the IBIS buffer model switches at a different voltage (say, 0.7 V for the IBIS buffer and 0.9 V for the real component and for the rising edge, and at 0.3 V for the IBIS model and 0.9 V for the real component for the falling edge). Yet the IBIS data has been gathered at the correct switching thresholds. (The effect being that the IBIS waveform's rising edge comes too early, and the falling edge too late, therefore the duty cycle is also different, the postive pulse is wider for the IBIS model than for the real component.)
- What switching thresholds can I expect the ibis_buffer component to use?
- How can I adjust it (if at all)?
- Is there any documentation available for download, like the "Spectre IBIS Appnote http://support.cadence.com/wps/mypoc/cos?uri=deeplinkmin:DocumentViewer;src=wp;q=ApplicationNotes/Custom_IC_Design/Spectre_IBIS_AN.pdf" quoted in a very old post from 12 years ago (at https://community.cadence.com/cadence_technology_forums/f/custom-ic-design/2818/running-ibis-model-file-in-spectre) or the Article 11446874, "How to include and simulate IBIS buffer models in ADE which include package parasitics?" from the same post, both unfortunately not being available anymore (dead link, no search results).
Thank you very much.