Quantcast
Channel: Cadence Custom IC Design Forum
Viewing all articles
Browse latest Browse all 4911

Spectre XPS MS post-layout simulation

$
0
0

Hi, 

We are designing a custom SRAM memory array, after extracting parasitics from layout (PEX) and trying to do post-layout simulation spectre needs too much time (1000hrs) if using aps++ mode. Therefore, we thought XPS MS will be a faster option without sacrificing accuracy. We tried Spectre XPS MS with digital speed =3, and 'enable post layout optimization' option since it's a must. However, the simulator deleted 90% of extracted caps and res and some internal nodes in the custom SRAM cell.

My question is how can adjust speed/accuracy and make sure we don't lose accuracy? Also is it reliable to use such XPS MS option in post-layout?

Note, the design is almost all digital, and we operate at 200MHz frquency.

I really appreciate your help.

Regards,

Mustafa.


Viewing all articles
Browse latest Browse all 4911

Trending Articles