Here is the output log (spoectre.out) when I try to run a transient simulation from ADE(L) in virtuoso. I initially wrote a d_ flip flop and applied a clock to the symbol of the d_flip_flop. Why do I get the error ?
Spectre (R) Circuit Simulator
Version 18.1.0.077 64bit -- 1 Aug 2018
Copyright (C) 1989-2018 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence and Spectre are registered trademarks of Cadence Design Systems, Inc. All others are the property of their respective holders.
Includes RSA BSAFE(R) Cryptographic or Security Protocol Software from RSA Security, Inc.
User: root Host: seminar-OptiPlex-3050 HostID: 7F0101 PID: 19163
Memory available: 1.7836 GB physical: 4.0223 GB
Linux : Ubuntu 16.04 LTS
CPU Type: Intel(R) Core(TM) i5-7500 CPU @ 3.40GHz
Socket: Processors [Frequency]
0: 0 [800.0], 1 [800.0], 2 [800.0], 3 [3401.0]
System load averages (1min, 5min, 15min) : 9.8 %, 5.0 %, 10.2 %
Simulating `input.scs' on seminar-OptiPlex-3050 at 3:54:51 PM, Thur May 23, 2019 (process id: 19163).
Current working directory: /root/simulation/d_ff_tb/spectre/schematic/netlist
Command line:
/vlsi/cad/cadence/SPECTRE181/tools/bin/spectre -64 input.scs \
+escchars +log ../psf/spectre.out +inter=mpsc \
+mpssession=spectre1_16392_2 -format psfxl -raw ../psf \
+lqtimeout 900 -maxw 5 -maxn 5
spectre pid = 19163
Loading /vlsi/cad/cadence/SPECTRE181/tools.lnx86/cmi/lib/64bit/5.0/libinfineon_sh.so ...
Loading /vlsi/cad/cadence/SPECTRE181/tools.lnx86/cmi/lib/64bit/5.0/libphilips_o_sh.so ...
Loading /vlsi/cad/cadence/SPECTRE181/tools.lnx86/cmi/lib/64bit/5.0/libphilips_sh.so ...
Loading /vlsi/cad/cadence/SPECTRE181/tools.lnx86/cmi/lib/64bit/5.0/libsparam_sh.so ...
Loading /vlsi/cad/cadence/SPECTRE181/tools.lnx86/cmi/lib/64bit/5.0/libstmodels_sh.so ...
Reading file: /root/simulation/d_ff_tb/spectre/schematic/netlist/input.scs
Reading file: /vlsi/cad/cadence/SPECTRE181/tools.lnx86/spectre/etc/configs/mapsubckt.cfg
Reading file: /vlsi/cad/cadence/SPECTRE181/tools.lnx86/spectre/etc/configs/spectre.cfg
Reading file: /vlsi/cad/cadence/EE668/d_ff/veriloga/veriloga.va
Reading file: /vlsi/cad/cadence/SPECTRE181/tools.lnx86/spectre/etc/ahdl/constants.vams
Reading file: /vlsi/cad/cadence/SPECTRE181/tools.lnx86/spectre/etc/ahdl/disciplines.vams
Time for NDB Parsing: CPU = 68 ms, elapsed = 299.449 ms.
Time accumulated: CPU = 80 ms, elapsed = 299.452 ms.
Peak resident memory used = 91.3 Mbytes.
Error found by spectre during AHDL read-in.
ERROR (VACOMP-2353): "/vlsi/cad/cadence/EE668/d_ff/veriloga/veriloga.va", near line 29: GCC version mismatch found. The GCC installation is either corrupted or has been modified. To solve the issue, either use the GCC version that came packaged with the release, or reinstall the release.
Opening directory input.ahdlSimDB/ (775)
Opening directory input.ahdlSimDB//31cae44eca85f506acf8071b666ca921.d_ff.ahdlcmi/ (775)
Opening directory input.ahdlSimDB//31cae44eca85f506acf8071b666ca921.d_ff.ahdlcmi/Linux-64/ (775)
Error found by spectre during AHDL read-in.
ERROR (SFE-91): Error when elaborating the instance d_ff. Simulation should be terminated.
Reading link: /vlsi/cad/cadence/SPECTRE181/tools.lnx86/spectre/etc/ahdl/discipline.h
Reading link: /vlsi/cad/cadence/SPECTRE181/tools.lnx86/spectre/etc/ahdl/constants.h
Time for Elaboration: CPU = 28 ms, elapsed = 185.845 ms.
Time accumulated: CPU = 108 ms, elapsed = 485.371 ms.
Peak resident memory used = 104 Mbytes.
Aggregate audit (3:54:52 PM, Thur May 23, 2019):
Time used: CPU = 108 ms, elapsed = 486 ms, util. = 22.2%.
Time spent in licensing: elapsed = 90.2 ms, percentage of total = 18.6%.
Peak memory used = 104 Mbytes.
Simulation started at: 3:54:51 PM, Thur May 23, 2019, ended at: 3:54:52 PM, Thur May 23, 2019, with elapsed time (wall clock): 486 ms.
spectre completes with 2 errors, 0 warnings, and 0 notices.
spectre terminated prematurely due to fatal error.