I have written a VerilogA testbench that runs a few automated tests using IC6.1.7 and SPECTRE171.
I thought it would be useful to plot the current test phase as a string on the waveform as this could help with analog debugging along the x-axis (time).
I might have managed to update a string variable at the start of every phase, but now it seems that I cannot access the variable in the VIVA results browser. I have also changed the output format to SST2 and tried using Simvision but this also did not work. I have made sure that "saveahdlvars" is set, and I can currently access and plot all the real and integer VerilogA variables.
I have done something similar inside a SystemVerilog bench through a Mixed-Mode simulation, but right now I want to avoid expanding my bench this far.
Is there a way for me to plot this variable on a waveform viewer?
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