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PVS Extraction Issue - Not finding PVS or QRC tab in Virtuoso Layout to do parasitic extraction

October 19, 2021, 4:13 am
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Hello,

I am using AMS 0.35um (C35B4C3) Process Hit Kit.

I finished a layout in Virtuoso Layout L. It does not have a schematic associated with it. I want to extract the layout and run simulation to ensure proper working.

The issue faced is that I do not know how to extract the layout. I do not find a PVS or QRC tab in Layout Window to do extraction. I went into the Launch-->Plugins tab but was unable to find a PVS tab.

The Cadence version is: IC6.1.8-64b.500.12

The Assura version is: sub-version 4.1_USR6_HF11

Checking for PVS home and version returns the following:

vaishakp@moose2(9-5:01am)$ env | grep PVS_HOME
PVS_HOME=/util-cse/cadence/ic/
vaishakp@moose2(10-5:04am)$ which pvs
/sbin/pvs

A deadline is approaching in a week and would be gratetful for any help.Kindly guide me on how to extract the layout without the schematic using PVS or QRC and run simulation on an extracted netlist....

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spicein different results

October 19, 2021, 11:59 pm
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Hi,

I am trying to import a cdl netlist. When I use the GUI in virtuoso (ICADVM20.1), the generated schematic is correct. When I use the command line (spiceIn -param with parameter file saved from the working GUI), the width and length of transistors are wrong. Interestingly, the spicein.log file is almost the same between the two.

Does anyone know what could be the source of discrepancy? My guess is the CDF callback is not automatically trigged after running spice-in from command line. If that is true, how should I resolve this?

CDL:

*.BIPOLAR
*.RESI = 0
*.RESVAL
*.CAPVAL
*.DIOPERI
*.DIOAREA
*.EQUATION
*.SCALE METER
*.MEGA
.PARAM

.SUBCKT inverter VDD VSS inp outp
*.PININFO inp:I outp:O VDD:B VSS:B
MM0 outp inp VSS VSS nch l=40n m=6 simM=2 Wfg=250.0n fingers=3
MM1 outp inp VDD VDD pch l=40n m=6 simM=2 Wfg=250.0n fingers=3
.ENDS

----------------------------------------------------------------------------------------------------------------

With GUI: wfinger=250n, l=40n, fingers=3, m=2 --> w=750n and total_m=6

With command line: wfinger=250n, l=40m, fingers=3, m=2 --> w=100n and total_m=1 which is very very weird!

Thanks in advance for your help.

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Search for all instances of a specific cell within a hierarchy

October 20, 2021, 1:20 am
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I'm trying to find a functionality I expect exists in Cadence but I don't see it in the documentation. I want to find all occurrences of a specific cell within a hierarchy. For example, I have a cell called 'analog_top' and I want to find every instance of a cell called 'cellName' down within 'analog_top' and anywhere lower in the hierarchy from this cell. Is there a built in function to do this? Thanks.

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leafValue data type processing in Cadence Virtuoso

October 20, 2021, 7:55 am
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Hello,

I am using Cadence Virtuoso IC6.8-64b.500.6

I am running a simulation over multiple corners from ADE Assembler. I have used calculation over corner to calculate some functions. As seen from the image below, the calculated function (accuracy in this example) is successfully calculated and plotted, however, the data type "leafValue" will not enable me to do any further data processing on the obtained signal (e.g, taking the average). The error message from the CIW is down.

Kindly I need your help to be able to process this signal

Thank you in advance

Regards

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paralleled inductors in cadence virtuoso

October 20, 2021, 11:44 pm
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I just started learning cadence virtuoso.When I connect two inductors in parallel in the circuit schematic, the simulation will report an error：

Fatal error found by spectre during topology check.
FATAL: The following branches form a loop of rigid branches (shorts) when added to the circuit:
L6:1 (from 0 to net09)

Virtuoso believes that two parallel inductors form a short circuit. Why is that?Doesn't Virtuoso support two inductors in parallel?I know that two parallel inductors can be replaced by one inductor. I just want to know why two inductors in parallel will report an error in virtuoso. Thank you very much.

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Sampled pnoise simulation, sampling frequency > pss frequency ?

October 21, 2021, 10:16 pm
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Simulating  sampled noise in pss+pnoise, it seems that sampling frequency must be "pss-frequency". Is it possible that sampling frequency is twice larger than pss-frequency?

For example, a choping amplfier, choping frequency is 1MHz, if I use sampled noise (not use timeaverage), I get "wrong" output noise, because sampling frequecy is 1MHz too.

I think if sampling frequecy is 2MHz, then I could get correct sampled (discrete) output noise, is this possiple in spectre? how to confiugre it, thank you!

[Simulator] Spectre 19.1

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.cdsinit setting to open assembler/explorer, by default, on a new window

October 22, 2021, 2:01 am
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Hello,

Is there a .cdsinit setting to open assembler/explorer, by default, on a new window?

Thank you

Best Regards

Aldo

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Package Library download issue

October 22, 2021, 6:34 am
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Hi all,

For the bonding Diagram, I want to download package library from europractrice website and use it.

However, after downloading the gds of package library, when i import it to some library all the layouts are empty.
I tried thatching different technology libraries *tmn65, basic,analog- but all the layout when i ope they are empty.

Picture1 shows from where i download the gds and picture 2 shows that in package library i have all cells but they all are empty

Can somebody please tell me how can it be done correctly>

From where i download the gds

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Several problems with interfacing Spectre through Matlab

October 22, 2021, 7:24 am
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Dear Community

I am trying to use Matlab's Spectre toolbox to read out simulation results. I am using Matlab 2021a and Spectre version 20.10.186

In particular, I want the following outputs:

  • Many operating point parameters from all transistors in the schematic
  • The AC waveform from a current signal, taken from the terminal "/R0/PLUS"
  • The total output noise (as waveform in V/sqrt(Hz)) from a linear noise analysis where the output nodes are named "/Ip" and "In", respectively.
  • The loop gain from an iprobe

When I type the command

cds_srr(result_dir)

I get the following output:

PSFversion: 1.00
dcOp-dc (dc).
dcOpInfo-info (info).
ac-ac (ac).
tran-tran (tran).
finalTimeOP-info (info).
modelParameter-info (info).
element-info (info).
outputParameter-info (info).
designParamVals-info (info).
primitives-info.primitives (info.primitives).
subckts-info.subckts (info.subckts).
variables (design_variables).

ans =

 12×1 cell array

 {'dcOp-dc' }
 {'dcOpInfo-info' }
 {'ac-ac' }
 {'tran-tran' }
 {'finalTimeOP-info' }
 {'modelParameter-info' }
 {'element-info' }
 {'outputParameter-info' }
 {'designParamVals-info' }
 {'primitives-info.primitives'}
 {'subckts-info.subckts' }
 {'variables' }

Problem 1:
I cannot get any DC operating point parameter. When I use

cds_srr(result_dir,'dcOpInfo-info','M1.m1.gm')

I get the message:

Error: The special signal is not exist.
One or more output arguments not assigned during call to "cds_innersrr".

Error in cds_srr (line 20)
 sig = cds_innersrr(dirname, dataset, signame, verbose);

In the result brower, I can see that the operating points are there. How do I access them?
 

Problem 2:
Where is the result of the noise simulation stored? There is a folder called "noise" in the result brower, and a corresponding signal called "out" (which is the waveform I want in Matlab). But cds_srr does not return any noise dataset.
 

Problem 3:
Same for the stability analysis. There is a folder called "stb", but no corresponding dataset.

Problem 4:
I get the following output from the AC analysis when using cds_srr(result_dir,'ac-ac')

Total: 22 properties
'PSFversion' 'BINPSF creation time' 'PSF style' 'PSF types' 'PSF sweeps' 'PSF sweep points' 'PSF sweep min' 'PSF sweep max' 'PSF groups' 'PSF traces' 'simulator' 'version' 'date' 'design' 'analysis type' 'analysis name' 'analysis description' 'xVecSorted' 'tolerance.relative' 'start' 'stop' 'operating point producer' 

Total: 2 type(s) of signals
Signal type: V Data type: Complex
'net2' 'net3' 
Signal type: I Data type: Complex
'M0:1' 'V0:p' 'V1:p'

In the result browser, there are much more signals saved in the ac folder (including my ""/R0/PLUS" signal which I want). Why can I not see them in Matlab?

Thank you for your help.
Best wishes,
Dominik
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L293DNE Quadruple Half-H Drivers

October 22, 2021, 7:32 pm
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The L293 and L293D are high-current quadruple half-H drivers. These devices are intended to power a variety of inductive loads, including relays, solenoids, DC and bipolar stepping motors, and other high-current and high-voltage loads. All inputs are TTL compatible and can withstand voltages of up to 7 V. Each output is an entire totem-pole drive circuit, complete with a Darlington transistor sink and a pseudo-Darlington source. Drivers are enabled in pairs, with 1,2EN enabling drivers 1 and 2 and 3,4EN enabling drivers 3 and 4.

...

I have learned L293DNE from this article:www.apogeeweb.net/.../l293dne-quadruple-half-h-drivers-datasheet-arduino-pinout.html
If you get more ideas, please tell me.

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Determine corner-dependent setting during operating point calculation with VerilogA model

October 11, 2021, 7:56 am
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Hello,

I have a circuit, which can be controlled in discrete steps to compensate for different process corners. I had the idea to create an additional Veriloga component, which determines the correct control setting during operating point calculation. However, I can not get it to work. My current code looks something like this

integer digCur = digMin;
analog begin
   if(analysis("static")) begin
      if (V(vin) < V(vref) && digCur < digMax) begin
         digCur = digCur + 1;
      end
   end
  
   V(vout) <+ digCur;
end

It is supposed to check only during dc-op analysis if the input value 'vin' is smaller than the reference 'vref' and if yes, increase the control word by 1. It should stop if the input exceeds the reference or the maximum control word is reached. This value should be kept and used for all subsequent simulations (eg. ac or hb).  However, even though the code runs, it does not behave as expected. The 'if' statement is only executed once and the dc simulation finishes with digCur = digMin + 1 as final value.

Is it actually possible to realize, what I want? I thought, that after the value of 'vout' changes, the dc simulation would have to restart, because the input for the controlled block has changed.

Best regards
Paul

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Transient simulation - adding noise after steady state

October 25, 2021, 2:57 am
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Hi,

We have a fairly large mixed-signal block, where we would like to get some transient simulation data with noise. However, to save simulation time, we would like to run up to steady-state first, without noise, and then add noise and simulate for some more time.

I did run a transient simulation with a save snapshot after steady state - however when I try to restart, it fails with a SimError (and seemingly nothing in the logs?) - I probably messed something up, allthough I am not entirely sure on what. I have two questions:

A) Is this snapshot saved somewhere, so I can try and save it for future use?
B) Is this method at all possible? Before I try and redo the transient steady state simulation (7 days of sim time) I would like to know if this is the most effiecient approach?

BR,
Christian

Virtuoso IC6.1.8-64b.500.20
Spectre 20.1.0.298.isr9
Xrun 20.09-s008

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Prevent Maestro from reporting undefined design variables

October 25, 2021, 3:11 pm
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Hello,

I have a cell view which contains standard elements (resistor, capacitor,...) with variables. I want to set these variables with a model file. However, everytime when I start the simulation, Maestro reports these variables as undefined. If I continue, the simulation fails, because the empty variables are added to the 'parameters' statement, which comes after my model file. 

Is there a way to prevent Maestro from automatically adding undefined variables? I found the 'findVariablesSkip' global variable in the documentation, which seems to do exactly what I want (ignore variables in extracted cell views, if the cell view contains the 'extractionCreatedBy' property). However, even if I set it to 'extracted' or 'parasitic' and add the 'extractionCreatedBy' property to my cell view, Maestro still complains about the variables.

Best regards

Paul

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Joining a line between two points on the output waveform in Cadence Virtuoso calculator tool

October 26, 2021, 10:01 am
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Hello,

I would like to ask if it is possible to create a straight line on the output waveform that joins two selected points from the waveform by using the Cadence calculator tool

Thank you

Best Regards

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Virtuoso Layout delete vertices

October 26, 2021, 1:12 pm
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Hi

Weird issue - haven't done layout in a couple of months but it didn't used to ever do this.  Now when I select things to delete (say a pin that's sitting on top of a rectangle) and I have the pin entirely selected, if I catch the rectangle's vertices below and delete, the pin gets deleted but also the vertex of the rectangle.  This didn't used to happen and I can't seem to find the feature I've accidentally enabled for this.

It's creating some very acute triangles in the layout which obviously aren't ideal

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voltus option power_enable_state_propagation?

October 27, 2021, 9:41 am
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Could I some information on voltus option power_enable_state_propagation? UserGuide has no meaningful definition of what this does exactly.

Thanks,

Kurt

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5G signal sources and simulation inside Spectre / Virtuoso

October 27, 2021, 11:26 am
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Hello All,

I am using IC618 & Spectre ISR20

do we have signal sources for 5G signal simulations inside Spectre / Virtuoso like there is a LTE source in RFLIB ?

Also does ICADVM20 version offer any advantages over IC618 towards this direction  ?

regards

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Virtuoso layout hierarchical copy contains mysterious residue from other libraries

October 27, 2021, 6:07 pm
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Hi,

I have never seen such a weird issue with hierarchical copy in Virtuoso. Let me explain.

We have a brand new library and brand new layout cellview (say "Lib_debug/debug_cellview/layout"), inside which there is an instance of Cell_target from our production library Lib_B and nothing else.

Lib_B/Cell_target used to have our real designs in it, but for debugging purpose, I deleted everything (including shapes, nets, instances, constraints and connectivity reference) and then drew only a piece of rectangle so it won't look empty.

Now I want to hierarchically copy it from "Lib_debug/debug_cellview/layout" to "Lib_debug/debug_cellview2/layout". I used the following copy menu. Note that none of Lib_A, Lib_B or Lib_C are in the skip libraries list.

Once I click OK, I get the following window. It is very strange that Lib_A shows up. While we did copy design from Lib_A when Lib_B was initially created, I have removed every instance in Lib_B/Cell_target. So I don't know where they are coming from.

So where does the Virtuoso copy tool find such information and how can I delete it?

I'm using Virtuoso ICADVM20.1

Thanks for any help!

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It's the same problem as the person above. Please tell me the solution

October 27, 2021, 11:27 pm
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Overriding specifications with VAR("...") expressions

October 28, 2021, 10:54 am
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Hello,

I have an AGC amplifier whose noise specifications depends on the gain step I'm at, temperature and corners.

I initially tackled this with some global variables that computes for me my noise spec depending on the gain step and temperature.
At the moment my specs look like this (I set it up using ADE Assembler):

For the corner-dependent spec, I have another variable called spec_noise_max_153kHz, which is the number I have to use for corners other than TT. I was planning to use this variable when overriding the spec for the other corners.

Unfortunately, I just found that, even though I'm allowed to use global variables in my specifications, I'm not allowed to use them when overriding them.

I could replace the spec_noise_... variable by a number, but the other variable I can't easily replace, as it comprises a bunch of nested ternary expressions which save me having to hardcode specs according to gain step, as well as a not having to create a new test for every new gain step whose noise I want to test.

The Virtuoso version I'm using is the following:

Being able to use VAR("...") expressions in the specs but not being able to when overriding them seems inconsistent to me. At first sight at least. I was wondering if this has been tackled in later versions of Virtuoso.

Thanks in advance for your help

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