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options Vthmod = maxgm : details of Vt calculation
Hi,I was wondering if there is additional documentation for the vthmod option value "maxgm", beside that in chapter 8 of the Spectre User's Manual. For example, I'd like to know how exactly the tangent...
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How to change the m factor (multiplication factor) for Instances in cadence
Hello,I start to work recently with Model Generator (ModGen) in Cadence Layout XL editor. The Cadence version is IC6.1.5 64 bit.In order to interdigitate my matched array transistors with a specific...
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I have a problem during import SPICE in Cadence IC 6.1.7
Hello, I tried to import an HSPICE netlist into Cadence IC but I got an error (SPICEIN-24).The netlist I tried to import contained multiple instances of a custom cell that is stored in the same...
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netlist error for a particular resistor model
Hello, I am unable to find the root cause for the following error . I have created a new work space, I tired to copy the model files which has this type .scs model, it didnt resolve the issue. Is...
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Contact (+1)-[833]-(284)-[2444] Yahoo Customer Service Phone Number USA
Yahoo mail is one of the best choice of the every people for using business or personal using purpose. And we all know email is one of the best choice search engines as well as business direction over...
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IC5141 core dump when launching icfb
I get a new core dump each time I launch icfb (IC5141). I'm not sure why and I would like to fix it.Here is the error message below:\o Aborted (core dumped)\o *Error* Failed to launch WaveScan. There...
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Matlab filtered PRBS inport in Cadence.
Hi Team,I have created a signal in Matlab, which is a Pseudo-Random Binary Sequence (PRBS), Then I FFT the sequence and filter the result in the frequency domain and then reverse FFT to form a...
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ERROR (SPECTRE-16080): No DC solution found (no convergence).
I got this message in the log file while performing the DC simulation. Please helperror found by spectre during DC analysis `dcOp'.ERROR (SPECTRE-16385): There were 8 attempts to find the DC solution....
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express_pcell_manager cache saving
Hi all,I have a question: supposing my cell A uses a pCell B from a PDK C. I open layout of A and using express_pcell_manager I save the cache of supermaster B. I then exit the virtuoso session. Later...
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How to ignore some instances from LVS in layout design
Hello,I am designing a fully differential amplifier, I am using "Iprobe" to test the CMFB stability by breaking the feedback loop.I am wondering if I want to do the layout and I don't want to remove...
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No DC solution found (no convergence)
I am a beginner in cadence tool. I am designing a hybrid full adder using CMOS/MTJ(magnetic tunnel junction) components. I am able to simulate the transient response clearly and obtained output for...
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Current state of the IC Design industry in the US
Hi all,I noticed in the last week a couple of posts about IC Design in the US were met with comments about a changing industry.A lot of people here said that in the US a PhD is becoming a minimum...
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How to change calculator fonts size
Hi everyone,I don't know if it's just me or does anyone have the same problem with calculator fonts size after updating to IC6.1.7-64b.500.13?After the new update, my calculator text size becomes...
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Multi Dimensional Plot using parametric analysis
Hello,I am using parametric analysis of noise simulation with three variables (L, Vdd, Vg) in the simple circuit shown below (L=60nm to 3um, 20pts), (Vdd=0 to 1, 10pts), (Vg=0 to 1, 51pts).The...
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How to set DC voltage parameter of "vdc" (analogLib) from the voltage...
How to set DC voltage parameter of "vdc" (analogLib) from the voltage generated from another instance. For example, I have a VCVS in a schematic, which gives output X, then I want to set a DC voltage...
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What do I need to install?
I have a user who wants to use IC6 and spectre.I don't see spectre with IC6 (IC 616 installed last week). On a different system, I see spectre installed in 6 other packages: EDI142, SPB166, SSV151,...
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pll lib for fractional divider
Hi Andrew,I vaguely remember that there's Cadence tutorial and workshop on fractional n pll sim/verification and there's a library for it (pllLib). However, I don't recall the details and wonder if...
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problem in UltraSim simulation
hello guys.I am using IC 5.10.41.When I used UltraSim simulator to run simulations on digital circuits, the simulation completed successfully but all the digital output voltages were 0;I checked the...
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vmsUpdateCellViews : How to disable/override user pop-ups?
When using vmsUpdateCellViews for the entire library on systemVerilog views, pop-ups for the HDL parser show up stopping the command from continuing. Is there a way to overcome this?Thanks,Rakesh.
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