deepprobe - ams - issue with \ in netlist

Hi,

I have a similar issue as in this thread: https://community.cadence.com/cadence_technology_forums/f/custom-ic-design/41411/deepprobe-to-a-bussed-net-in-ams

My testbench looks like this:

tb_circuit -> schematic:

• DUT -> device under Test
  • submodule1
  • submodule2
  • net "control_signal_dig" connecting 2 ports of submodule1 and submodule2
• net named "control_signal_dig_probed"
• deepprobe, connected to net "control_signal_dig_probed"
  • Hierarchical Node: "DUT.control_signal_dig"

What I want to do with this, is probing the net "control_signal_dig" from the DUT, and make it available at the top level of the testbench schematic.

This is also working when the submodules are running on transistor level (control_signal_dig is an output of submodule1 - which is an analog levelshifter).
The netlist looks like this:

iprobe IPRB0 (DUT.control_signal_dig, control_signal_dig_probed);

However, when I change the submodules to a verilog model (by setting up a config view), this doesn't work anymore. When I plot the "control_signal_dig", the output of the verilog model is correct (logical 0 or 1).
But the "control_signal_dig_probed" is 0V (so not even a digital signal) in the waveform viewer.

The netlist looks like this:
iprobe IPRB0 (\DUT.control_signal_dig, s2d_phi2_dig_probed);

Note the "\" which, as mentioned in the other thread, is " added out of nowhere by the netlister."

I assume that the "\" is also my problem, but I don't know how to solve it.
In my case, the issue is not due to a bus. The net "control_signal_dig" is a single signal, not a bus.

The simulation is started from ADE Assembler, simulator is set to ams.

Tool versions:

xrun(64)    20.09-s016
spectre     20.1.0.404.isr13

Thanks!