I am trying to simulate a very large circuit having some control digital input which I need to change multiple time during simulation. It has different logic states which I need to verify. For verification I have to run the simulation for every logic states. The circuit takes a lot of time to settle because of its slow transient behavior and I can apply the logic state only after the transient behavior is over. Can I save this initial transient behavior to some file and use the same file to start my simulation for every logic state? This initial transient behavior is independent of logic state given. In that way, I will save my simulation time. Is there any other approach to fasten the simulation?
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