Hi everyone,
I'm fairly new to Cadence so I'm sorry if this is easily solvable.
I am trying to generate a symbol with a variable parameter. For instance, I have an inverter with the NMOS width set to : pPar("width") and the PMOS width set to: 2*pPar("width").
I have gone through the CDF window to edit the parameter using the base CDF layer. (See picture for reference)
Here is the schematic of my simple design:
And here is the schematic using the instantiated inverter as a symbol:
When I try to run a simple simulation using Spectre, I get the following error:
I am wondering what I am doing wrong.
Edit: All schematic have been compiled and checked by the Virtuoso schematic editor with no errors or warnings.
Thank you very much for your help,
Alexandre Boyer