Hi,
I'm trying to implement an example from Andrew written in verilog A using ADEXL spectre, I have written the following code to simulate Chi distribution in monte carlo
module FET_MC1_Chi(Drain,Gate,Source,Sub);
parameter real mean =19;
parameter integer seed= 1234;
parameter real rpoisson_mis=$rdist_poisson(seed,mean,"instance");
parameter real rpoisson_proc=$rdist_poisson(seed,mean,"global");
localparam real a_eff = a+ rpoisson_mis + rpoisson_proc;
localparam real b_eff = b ;
endmodule
and my statistical block is the following
parameters mean=0.0;
statistics {
mismatch {
vary mean dist=gauss std=1.6
}
process {
vary mean dist=gauss std=0.1
}
}
The error observed are
ERROR (SFE-841): "input.scs" 18: Unexpected character `$' in netlist.
ERROR (SFE-841): "input.scs" 19: Unexpected character `$' in netlist.
Additionally it makes seedmeaninstance and seedmeanglobal as two variables..
I have also written ahdl_include FET_MC1_Chi.va to mitigate the problem. However, to which I got the error
Can not open input file `FET_MC1_Chi.va'. No such file or directory. Ensure that the file exists and the path to the file is correct. Otherwise, use the -I<path> command-line option to specify the path to the file.
To solve this I tried implementing setenv CDS_VLOGA_INCLUDE /.automount/infofa/h/users/skare0/FET/model5
Please give me your valuable suggestion to what I'm doing and how can I connect it. I'm using IC617
Regards
Shobhit